Changelog for
yosys-data-0.45-lp156.1.1.noarch.rpm :
* Wed Sep 04 2024 Wojciech Kazubski
- Update to version 0.45
* Various + Added cell types help messages.
* New back-ends + Added initial NG-Ultra support. ( synth_nanoxplore )
* Sun Aug 11 2024 Wojciech Kazubski - Update to version 0.44
* Various + Added ENABLE_LTO compile option to enable link time optimizations. + Build support for Haiku OS.
* New commands and options + Added \"keep_hierarchy\" pass to add attribute with same name to modules based on cost. + Added options \"-noopt\",\"-bloat\" and \"-check_cost\" to \"test_cell\" pass.
* New back-ends Added initial PolarFire support. ( synth_microchip )
* Wed Jul 10 2024 Wojciech Kazubski - Update to version 0.43
* Various + C++ compiler with C++17 support is required. + Support for IO liberty files for verification. + Limit padding from shiftadd for \"peepopt\" pass.
* Verific support + Support building Yosys with various Verific library configurations. Can be built now without YosysHQ specific patch and extension library.
* Tue Jun 11 2024 Wojciech Kazubski - Update to version 0.42
* New commands and options + Added \"box_derive\" pass to derive box modules. + Added option \"assert-mod-count\" to \"select\" pass. + Added option \"-header\",\"-push\" and \"-pop\" to \"log\" pass.
* Intel support + Dropped Quartus support in \"synth_intel_alm\" pass.
* Wed May 29 2024 Wojciech Kazubski - Update to version 0.41
* New commands and options + Added \"cellmatch\" pass for picking out standard cells automatically.
* Various + Extended the experimental incremental JSON API to allow arbitrary smtlib subexpressions. + Added support for using ABCs library merging when providing multiple liberty files.
* Verific support + Expose library name as module attribute.
* Thu Apr 11 2024 Wojciech Kazubski - Update to version 0.40
* New commands and options + Added option \"-vhdl2019\" to \"read\" and \"verific\" pass.
* Various + Major documentation overhaul. + dded port statistics to \"stat\" command. + Added new formatting features to cxxrtl backend.
* Verific support + Added better support for VHDL constants import. + Added support for VHDL 2009.
* Wed Apr 03 2024 Wojciech Kazubski - Update to version 0.39
* New commands and options + Added option \"-extra-map\" to \"synth\" pass. + Added option \"-dont_use\" to \"dfflibmap\" pass. + Added option \"-href\" to \"show\" command. + Added option \"-noscopeinfo\" to \"flatten\" pass. + Added option \"-scopename\" to \"flatten\" pass.
* SystemVerilog + Added support for packed multidimensional arrays.
* Various + Added \"$scopeinfo\" cells to preserve information about the hierarchy during flattening. + Added sequential area output to \"stat -liberty\". + Added ability to record/replay diagnostics in cxxrtl backend.
* Verific support + Added attributes to module instantiation.- Patch fix_clk2fflogic_test.patch removed (applied upstream
* Fri Mar 01 2024 Wojciech Kazubski - Fix build for Leap 15.x (python >= 3.7 is needed to run tests)
* Mon Feb 26 2024 Stefan Brüns - Update to version 0.38 See https://github.com/YosysHQ/yosys/releases for details- Add fix_clk2fflogic_test.patch
* Sat Nov 05 2022 Stefan Brüns - Update to version 0.22 See https://github.com/YosysHQ/yosys/releases for details
* Sun Dec 20 2020 Stefan Brüns - Update to version 0.9+git20201222- Package abc separately (package yosys-abc)- Move architecture indepedent files to subpackage- Enable test suite, add patches required to pass
* 0001-Fix-use-after-free-in-LUT-opt-pass.patch
* 0001-ice40-tolerate-unconnected-SB_LUT4-inputs.patch- Cleanup spec file:
* Fix License tag
* Remove obsolete distro version conditionals
* Remove obsolete constructs
* Move changelog to separate changes file
* Tag license file correctly
* Tue Dec 22 2015 David Lanzendörfer - switching to GIT
* Tue Dec 08 2015 David Lanzendörfer - yosys port to openSUSE
* Mon Apr 06 2015 Gabriel.Gouvine - Packaged the 0.5 version of yosys- Do not download ABC through the net but use an archive.
