Changelog for
libdnnl3-3.1-1.32.x86_64.rpm :
* Tue Mar 21 2023 Guillaume GARDET
- Update to 3.0.1:
* Changes: https://github.com/oneapi-src/oneDNN/releases/tag/v3.0.1- Skipped 3.0:
* Changes: https://github.com/oneapi-src/oneDNN/releases/tag/v3.0- Add patch to fix build with GCC13:
* onednn-fix-gcc13.patch- Disable Arm Compute library support until fixed upstream https://github.com/oneapi-src/oneDNN/issues/1599- Drop upstream patches:
* 1428.patch
* fa93750.patch
* Tue Sep 20 2022 Guillaume GARDET - Add patch to fix build with latest Arm Compute Library:
* 1428.patch
* fa93750.patch (dep for 1428.patch)
* Tue Sep 13 2022 Paolo Stivanin - Update to 2.6.2:
* https://github.com/oneapi-src/oneDNN/releases- Removed onednn-1045.patch.- Removed onednn-xbyak-aarch64.patch.
* Tue Jun 15 2021 Guillaume GARDET - Fix build on aarch64:
* onednn-xbyak-aarch64.patch
* Tue Jun 15 2021 Guillaume GARDET - Update to version 2.2.4:
* Fixed build error with GCC 11 (eda1add)
* Fixed an issue with reorder reporting unimplemented when quantizing f32 weights to s8 (4f05b76, 5d3d1e1, cc77eef)
* Updated name for GPU gen12 architecture to xe (3d202c2)- Drop upstream patch:
* 0001-common-gpu-include-thread-and-limit-headers-to-fix-G.patch
* Thu Jun 03 2021 Ferdinand Thiessen - Update to version 2.2.3
* Fixed a bug in int8 depthwise convolution ptimitive with groups and 1d spatial size for processors with AVX-512 and AVX2 support
* Fixed correctness issue for PReLU primitive
* Fixed corretness issue in reorder for blocked layouts with zero padding
* Improved performance of weights reorders used by BRGEMM-based convolution primitive for processors with AVX-512 support
* Added -fp-model=precise build flag for DPC++ code
* Fixed potential memory leak in matmul primitive
* Fixed performance of matmul primitive when fused with bias update and sum
* Fixed a bug in matmul primitive when writing to non-contiguous destination buffer- Add upstream patch for GCC11 support
* 0001-common-gpu-include-thread-and-limit-headers-to-fix-G.patch
* Thu May 27 2021 Jan Engelhardt - Update descriptions.
* Wed May 26 2021 Guillaume GARDET - Update to 2.2.2, changes:
* Fixed performance regression in fp32 forward inner product for shapes with number of output channels equal to 1 for processors with Intel AVX-512 support (714b1fd)
* Fixed performance regression in forward convolutions with groups for processors with Intel AVX-512 support(3555d4a)
* Removed -std=c++11 build flag for DPC++ headers (1fcb867)
* Fixed buffer access in initializing workspace in RNN implementation on GPU (9b03091)
* Fixed fix a bug in convolution with 1x1 kernel and mixed strides on processors with Intel AVX-512 support (d0b3e3f)
* Used getauxval for Linux to get CPU features on for AArch64 systems (25c4cea)
* Added -fp-model=precise build flag for DPC++ code (3e40e5e)
* Fixed out-of-bounds writes in elementwise primitive on Intel Processor Graphics (bcf823c)- Fix build with Arm Compute Library:
* onednn-1045.patch
* Tue Apr 13 2021 Guillaume GARDET - Update to 2.2.1, changes:
* From 2.2: Fixed segfault for cases when primitive descriptor or attributed contain NaN (e6d05ec, dbca1e9, 0326b09, 0326b09) Fixed engine creation failure for GPU subdevices (4c3a114) Fixed long lines clipping in verbose output (70d70a8) Fixed segfault in bfloat16 convolution weight gradient implementation on processors with Intel AMX support (a3a73a3) Fixed performance regression in binary primitive with per_oc broadcast strategy (9ac85d8) Worked around a bug with Microsoft Visual C++ compiler version detection in CMake 3.19 (2f39155) Removed -std=c++11 build flag for DPC++ code to align with SYCL standard (1b026f5)
* Changes between 2.1 and 2.2: Performance Optimizations Intel Architecture processors Improved performance of int8 compute functionality for future Intel Xeon Scalable processor (code name Sapphire Rapids). The functionality is disabled by default and should be enabled via CPU dispatcher control. Improved performance of compute functionality for future Intel Core processor with Intel AVX2 and Intel DL Boost instructions support (code name Alder Lake). Improved fp32 inner product forward propagation performance for processors with Intel AVX-512 support. Improved dnnl_gemm performance for cases with n=1 on all supported processors. Intel Graphics products Introduced NHWC format support for activations for int8 primitives. AArch64-based processors Improved performance of fp32 and int8 convolution, and softmax primitives for processors with SVE 512 support. Improved performance of fp32 convolution via Arm Compute Library (ACL). Improved performance of convolution with a combination of sum and relu post-ops via ACL. Functionality Extended eltwise primitive with support for mish and hardswish algorithms. Extended binary primitive with support for comparison operators. Introduced support for post-ops in GPU resampling implementation. Introduced asymmetric quantization support for int8 deconvolution. Introduced binary post-ops support for matmul primitive. Usability Improved presentation of oneDNN primitives in VTune Amplifier. Introduced Linux perf support for AArch64. Introduced support for Fujitsu C++ compiler. Introduced a build time check for minimal supported ACL version. Currently oneDNN requires ACL 21.02 or later. Added support for cuDNN 8.x
* Wed Feb 17 2021 Guillaume GARDET - Update to 2.1- Add Arm ComputeLibrary support on aarch64
