Changelog for pciutils-3.13.0-4.3.i586.rpm :

* Fri Jul 19 2024 Peter Simons - Synchronize SLE-15 and openSUSE:Factory [PED-8393, bsc#1224138]. The following patches are now obsolete in version 3.13.0:
* lspci-Fixed-buffer-overflows-in-ls-tree.c.patch
* pciutils-Add-PCIe-5.0-data-rate-32-GT-s-support.patch
* pciutils-Add-PCIe-6.0-data-rate-64-GT-s-support.patch
* pciutils-Add-decoding-of-vendor-specific-VPD-fields.patch
* pciutils-VPD-Cleanup.patch
* pciutils-VPD-When-printing-item-IDs-escape-non-ASCII-characte.patch
* Sun Jun 30 2024 Dirk Müller - update to 3.13.0:
* lspci decodes CXL 1.1 device link status information.
* Further development of the pcilmr (the link margining utility)
* Dump parsing supports 6-digit domain numbers.
* Bug fixes in PCIe link state reporting.
* Decode more fields in PCIe AER capability.
* Fixed build on Linux systems with musl libc.
* Updated pci.ids.
* Sun Jun 09 2024 Andreas Stieger - update to 3.12.0:
* lspci decodes the IDE (Integrity & Data Encryption) and TEE-IO extended capabilities.
* Optimization flags used for compiling individual object files should be the same as optimization flags for linking the final executable to make link-time optimization possible.
* no longer look up subsystems in the HWDB
* Updated pci.ids- include changes from 3.11:
* update-pciids now supports XZ compression
* update-pciids now sends itself as the User-Agent.
* Added a pcilmr utility for PCIe lane margining
* ECAM back-end now scans ACPI and BIOS memory faster.
* Linux systems without pread/pwrite are no longer supported
* Improved decoding of PCIe control and status registers.
* Decoding of CXL capabilities now supports up to CXL 3.0.
* lspci now displays interrupt message numbers consistently across different capabilities.
* Cache of IDs resolved via DNS, which was located in ~/.pci-ids by default, is now stored according to the XDG base directory specification in $XDG_CACHE_HOME/pci-ids.
* All source files now have SPDX license identifiers.
* various minor bug fixes and updated pci.ids.
* Wed Oct 04 2023 Peter Simons - Apply \"lspci-Fixed-buffer-overflows-in-ls-tree.c.patch\" to fix a buffer overflow error that would cause lspci to crash on systems with complex topologies. [bsc#1215265]- Add \"pciutils.keyring\" so that the tarball\'s signature can be verified at build time.- Use \"%license\" tag instead of \"%doc\" to install the package\'s license file.
* Thu May 11 2023 Paolo Stivanin - Update to 3.10.0: - Fixed bug in definition of versioned symbol aliases in shared libpci, which made compiling with link-time optimization fail. - Filters now accept \"0x...\" syntax for backward compatibility. - Windows: The cfgmgr32 back-end which provides the list of devices can be combined with another back-end which provides access to configuration space. - ECAM (Enhanced Configuration Access Mechanism), which is defined by the PCIe standard, is now supported. It requires root privileges, access to physical memory, and also manual configuration on some systems. - lspci: Tree view now works on multi-domain systems. It now respects filters properly. - Last but not least, pci.ids were updated to the current snapshot of the database. This includes overall cleanup of entries with non-ASCII characters in their names -- such characters are allowed, but only if they convey interesting information (e.g., umlauts in German company names, but not the \"registered trade mark\" sign).
* Tue Dec 27 2022 Ludwig Nussel - Replace transitional %usrmerged macro with regular version check (boo#1206798)
* Fri Dec 02 2022 Dirk Müller - update to 3.9.0:
* We decode Compute Express Link (CXL) capabilities.
* The tree mode of lspci is now compatible with filtering options.
* When setpci is used with a named register, it checks whether the register is present in the particular header type.
* Linux: The intel-conf[12] back-ends prefer to use ioperm() instead of iopl() to gain access to I/O ports.
* mmio-conf1(-ext): Added a new back-end implementing the intel-conf1 interface over MMIO. This is useful on some ARM machines, but it requires manual configuration of the MMIO addresses.
* As usually, updated pci.ids to the current snapshot of the database.
* Thu May 12 2022 Callum Farmer - Make shared library executable
* Thu Apr 21 2022 Paolo Stivanin - Update to 3.8.0:
* Filters can now match devices based on partially specified class code and also on the programming interface.
* Reporting of link speeds, power limits, and virtual function tags has been updated to the current PCIe specification.
* We decode the Data Object Exchange capability.
* Bus mapping mode works in non-zero domains.
* pci_fill_info() can fetch more fields: bridge bases, programming interface, revision, subsystem vendor and device ID, OS driver, and also parent bridge. Internally, the implementation was rewritten, significantly reducing the number of corner cases to be handled.
* If the configuration space is not readable for some reason (e.g., the cfgmgr32 back-end, but also badly implemented sleep mode of some devices), lspci prints only information provided by the OS.
* The Hurd back-end was greatly improved thanks to Joan Lledó.
* Various minor bug fixes and improvements.
* As usually, updated pci.ids to the current snapshot of the database.- Rebase pciutils-3.1.9_pkgconfig.patch- Rebase pciutils-ocloexec.patch- Rebase pciutils-endianh.patch- Drop pciutils-add-decode-support-for-RCECs.patch
* Mon Jan 24 2022 vliaskovitisAATTsuse.com- Add \"pciutils-Add-PCIe-5.0-data-rate-32-GT-s-support.patch\" and \"pciutils-Add-PCIe-6.0-data-rate-64-GT-s-support.patch\" to fix LnkCap speed recognition in lspci for multi PCIe ports such as the ML110 Gen11. [bsc#1192862]
* Sun Jan 23 2022 Callum Farmer - Set sbindir to /usr/bin to fix Steam issues (rh#1858437, gh#ValveSoftware/steam-for-linux#3306)- Add symlinks from /usr/sbin to /usr/bin
* Tue May 11 2021 Callum Farmer - prepare usrmerge (boo#1029961)