Content of RPM benchdnn-2.7-5.1.x86_64.rpm :
/usr/bin/benchdnn
/usr/share/benchdnn
/usr/share/benchdnn/inputs
/usr/share/benchdnn/inputs/binary
/usr/share/benchdnn/inputs/binary/harness_binary_bf16
/usr/share/benchdnn/inputs/binary/harness_binary_different_dt
/usr/share/benchdnn/inputs/binary/harness_binary_f16
/usr/share/benchdnn/inputs/binary/harness_binary_f32
/usr/share/benchdnn/inputs/binary/harness_binary_i8
/usr/share/benchdnn/inputs/binary/option_set_all
/usr/share/benchdnn/inputs/binary/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/binary/option_set_minimal
/usr/share/benchdnn/inputs/binary/option_set_src0_bcast
/usr/share/benchdnn/inputs/binary/perf_binary_gpu
/usr/share/benchdnn/inputs/binary/shapes_ci
/usr/share/benchdnn/inputs/binary/shapes_perf_1st_conv
/usr/share/benchdnn/inputs/binary/shapes_perf_scaleshift
/usr/share/benchdnn/inputs/binary/test_binary_all
/usr/share/benchdnn/inputs/binary/test_binary_bfloat16
/usr/share/benchdnn/inputs/binary/test_binary_ci
/usr/share/benchdnn/inputs/binary/test_binary_different_dt_ci
/usr/share/benchdnn/inputs/binary/test_binary_float16
/usr/share/benchdnn/inputs/binary/test_binary_gpu
/usr/share/benchdnn/inputs/bnorm
/usr/share/benchdnn/inputs/bnorm/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/bnorm/perf_bnorm_gpu
/usr/share/benchdnn/inputs/bnorm/set_nd
/usr/share/benchdnn/inputs/bnorm/set_topologies
/usr/share/benchdnn/inputs/bnorm/set_topologies_gpu
/usr/share/benchdnn/inputs/bnorm/shapes_1d
/usr/share/benchdnn/inputs/bnorm/shapes_2d
/usr/share/benchdnn/inputs/bnorm/shapes_3d
/usr/share/benchdnn/inputs/bnorm/shapes_ci
/usr/share/benchdnn/inputs/bnorm/shapes_densenet_121
/usr/share/benchdnn/inputs/bnorm/shapes_googlenet_v2
/usr/share/benchdnn/inputs/bnorm/shapes_googlenet_v3
/usr/share/benchdnn/inputs/bnorm/shapes_large
/usr/share/benchdnn/inputs/bnorm/shapes_regressions
/usr/share/benchdnn/inputs/bnorm/shapes_resnet_50
/usr/share/benchdnn/inputs/bnorm/shapes_topologies_small
/usr/share/benchdnn/inputs/bnorm/test_bnorm_all_blocked
/usr/share/benchdnn/inputs/bnorm/test_bnorm_all_plain
/usr/share/benchdnn/inputs/bnorm/test_bnorm_bfloat16_blocked
/usr/share/benchdnn/inputs/bnorm/test_bnorm_bfloat16_plain
/usr/share/benchdnn/inputs/bnorm/test_bnorm_ci
/usr/share/benchdnn/inputs/bnorm/test_bnorm_gpu
/usr/share/benchdnn/inputs/bnorm/test_bnorm_regressions
/usr/share/benchdnn/inputs/bnorm/test_bnorm_regressions_large
/usr/share/benchdnn/inputs/brgemm
/usr/share/benchdnn/inputs/brgemm/harness_brgemm_f32
/usr/share/benchdnn/inputs/brgemm/harness_brgemm_fpmath
/usr/share/benchdnn/inputs/brgemm/harness_brgemm_skip_acc
/usr/share/benchdnn/inputs/brgemm/option_set_bf16
/usr/share/benchdnn/inputs/brgemm/option_set_f32
/usr/share/benchdnn/inputs/brgemm/option_set_int8
/usr/share/benchdnn/inputs/brgemm/shapes_2d_big_k_bf16
/usr/share/benchdnn/inputs/brgemm/shapes_2d_big_k_f32
/usr/share/benchdnn/inputs/brgemm/shapes_2d_big_k_int8
/usr/share/benchdnn/inputs/brgemm/shapes_2d_big_k_tail_n_bf16
/usr/share/benchdnn/inputs/brgemm/shapes_2d_big_k_tail_n_f32
/usr/share/benchdnn/inputs/brgemm/shapes_2d_big_k_tail_n_int8
/usr/share/benchdnn/inputs/brgemm/shapes_2d_no_tail_bf16
/usr/share/benchdnn/inputs/brgemm/shapes_2d_no_tail_f32
/usr/share/benchdnn/inputs/brgemm/shapes_2d_no_tail_int8
/usr/share/benchdnn/inputs/brgemm/shapes_2d_tail_k_bf16
/usr/share/benchdnn/inputs/brgemm/shapes_2d_tail_k_f32
/usr/share/benchdnn/inputs/brgemm/shapes_2d_tail_k_int8
/usr/share/benchdnn/inputs/brgemm/shapes_2d_tail_k_tail_n_bf16
/usr/share/benchdnn/inputs/brgemm/shapes_2d_tail_k_tail_n_f32
/usr/share/benchdnn/inputs/brgemm/shapes_2d_tail_k_tail_n_int8
/usr/share/benchdnn/inputs/brgemm/shapes_2d_tail_n_bf16
/usr/share/benchdnn/inputs/brgemm/shapes_2d_tail_n_f32
/usr/share/benchdnn/inputs/brgemm/shapes_2d_tail_n_int8
/usr/share/benchdnn/inputs/brgemm/test_brgemm_all
/usr/share/benchdnn/inputs/brgemm/test_brgemm_bf16
/usr/share/benchdnn/inputs/brgemm/test_brgemm_ci
/usr/share/benchdnn/inputs/brgemm/test_brgemm_int8
/usr/share/benchdnn/inputs/concat
/usr/share/benchdnn/inputs/concat/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/concat/option_set_gen9_gpu
/usr/share/benchdnn/inputs/concat/test_concat_all
/usr/share/benchdnn/inputs/concat/test_concat_bfloat16
/usr/share/benchdnn/inputs/concat/test_concat_ci
/usr/share/benchdnn/inputs/concat/test_concat_float16
/usr/share/benchdnn/inputs/concat/test_concat_gpu
/usr/share/benchdnn/inputs/conv
/usr/share/benchdnn/inputs/conv/harness_arbitrary_dst
/usr/share/benchdnn/inputs/conv/harness_conv_attrs_gpu
/usr/share/benchdnn/inputs/conv/harness_conv_attrs_int8
/usr/share/benchdnn/inputs/conv/harness_conv_attrs_int8_asymmetric
/usr/share/benchdnn/inputs/conv/harness_conv_auto
/usr/share/benchdnn/inputs/conv/harness_conv_deepbench
/usr/share/benchdnn/inputs/conv/harness_conv_depthwise_int8
/usr/share/benchdnn/inputs/conv/harness_conv_dilated_3d
/usr/share/benchdnn/inputs/conv/harness_conv_dilated_int8
/usr/share/benchdnn/inputs/conv/harness_conv_dw_bfloat16
/usr/share/benchdnn/inputs/conv/harness_conv_dw_bfloat16_nxc
/usr/share/benchdnn/inputs/conv/harness_conv_f32
/usr/share/benchdnn/inputs/conv/harness_conv_f32_nxc
/usr/share/benchdnn/inputs/conv/harness_conv_fused_depthwise
/usr/share/benchdnn/inputs/conv/harness_conv_int8
/usr/share/benchdnn/inputs/conv/harness_conv_regression_general
/usr/share/benchdnn/inputs/conv/harness_conv_saturation_int8
/usr/share/benchdnn/inputs/conv/harness_conv_tags
/usr/share/benchdnn/inputs/conv/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/conv/perf_conv_bdw_1sock
/usr/share/benchdnn/inputs/conv/perf_conv_clx_1sock
/usr/share/benchdnn/inputs/conv/perf_conv_gen9
/usr/share/benchdnn/inputs/conv/perf_conv_skx_1sock
/usr/share/benchdnn/inputs/conv/perf_conv_xe_hp
/usr/share/benchdnn/inputs/conv/perf_conv_xe_lp
/usr/share/benchdnn/inputs/conv/set_all_topologies
/usr/share/benchdnn/inputs/conv/set_conv_3d
/usr/share/benchdnn/inputs/conv/set_conv_all
/usr/share/benchdnn/inputs/conv/set_conv_dw
/usr/share/benchdnn/inputs/conv/set_dilated-conv
/usr/share/benchdnn/inputs/conv/set_dilated-conv_1st
/usr/share/benchdnn/inputs/conv/set_dilated-conv_3d
/usr/share/benchdnn/inputs/conv/set_fastrcnn
/usr/share/benchdnn/inputs/conv/set_gpu
/usr/share/benchdnn/inputs/conv/set_maskrcnn
/usr/share/benchdnn/inputs/conv/set_perf_cpu_all_mb
/usr/share/benchdnn/inputs/conv/set_perf_cpu_inference_only
/usr/share/benchdnn/inputs/conv/set_perf_cpu_large_mb
/usr/share/benchdnn/inputs/conv/set_perf_cpu_small_mb
/usr/share/benchdnn/inputs/conv/set_perf_gpu_all_mb
/usr/share/benchdnn/inputs/conv/set_perf_gpu_large_mb
/usr/share/benchdnn/inputs/conv/set_perf_gpu_small_mb
/usr/share/benchdnn/inputs/conv/set_topologies_inference_only
/usr/share/benchdnn/inputs/conv/shapes_1d
/usr/share/benchdnn/inputs/conv/shapes_1d_wavenet
/usr/share/benchdnn/inputs/conv/shapes_1x1
/usr/share/benchdnn/inputs/conv/shapes_3d
/usr/share/benchdnn/inputs/conv/shapes_3d_1st_strided_padding
/usr/share/benchdnn/inputs/conv/shapes_3d_1x1_strided_no-padding
/usr/share/benchdnn/inputs/conv/shapes_3d_1x1_strided_padding
/usr/share/benchdnn/inputs/conv/shapes_3d_1x1_unit-stride_no-padding
/usr/share/benchdnn/inputs/conv/shapes_3d_1x1_unit-stride_padding
/usr/share/benchdnn/inputs/conv/shapes_3d_2d_strided_padding
/usr/share/benchdnn/inputs/conv/shapes_3d_gpu
/usr/share/benchdnn/inputs/conv/shapes_3d_i3d
/usr/share/benchdnn/inputs/conv/shapes_3d_resnext101
/usr/share/benchdnn/inputs/conv/shapes_3d_strided_no-padding
/usr/share/benchdnn/inputs/conv/shapes_3d_strided_padding
/usr/share/benchdnn/inputs/conv/shapes_3d_unet
/usr/share/benchdnn/inputs/conv/shapes_3d_unit-stride_no-padding
/usr/share/benchdnn/inputs/conv/shapes_3d_unit-stride_padding
/usr/share/benchdnn/inputs/conv/shapes_a3c
/usr/share/benchdnn/inputs/conv/shapes_alexnet
/usr/share/benchdnn/inputs/conv/shapes_auto
/usr/share/benchdnn/inputs/conv/shapes_basic
/usr/share/benchdnn/inputs/conv/shapes_basic_gpu
/usr/share/benchdnn/inputs/conv/shapes_cosmictagger
/usr/share/benchdnn/inputs/conv/shapes_deepbench_inference_device
/usr/share/benchdnn/inputs/conv/shapes_deepbench_inference_server
/usr/share/benchdnn/inputs/conv/shapes_deepbench_training
/usr/share/benchdnn/inputs/conv/shapes_densnet
/usr/share/benchdnn/inputs/conv/shapes_dilated
/usr/share/benchdnn/inputs/conv/shapes_dilated_1d_1st_strided_padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_1d_strided_no-padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_1d_strided_padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_1d_unit-stride_no-padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_1d_unit-stride_padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_2d_1st_strided_padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_2d_strided_no-padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_2d_strided_padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_2d_unit-stride_no-padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_2d_unit-stride_padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_3d_strided_no-padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_3d_strided_padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_3d_unit-stride_no-padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_3d_unit-stride_padding
/usr/share/benchdnn/inputs/conv/shapes_dilated_rfcn
/usr/share/benchdnn/inputs/conv/shapes_dw_1d_stride_no-padding
/usr/share/benchdnn/inputs/conv/shapes_dw_1d_unit-stride_no-padding
/usr/share/benchdnn/inputs/conv/shapes_dw_1d_unit-stride_padding
/usr/share/benchdnn/inputs/conv/shapes_dw_2d_1d_strided_padding
/usr/share/benchdnn/inputs/conv/shapes_dw_2d_strided_no-padding
/usr/share/benchdnn/inputs/conv/shapes_dw_2d_strided_padding
/usr/share/benchdnn/inputs/conv/shapes_dw_2d_unit-stride_no-padding
/usr/share/benchdnn/inputs/conv/shapes_dw_2d_unit-stride_padding
/usr/share/benchdnn/inputs/conv/shapes_dw_minibatch_2d-spatial
/usr/share/benchdnn/inputs/conv/shapes_dw_minibatch_channel_2d-spatial
/usr/share/benchdnn/inputs/conv/shapes_efficientdet
/usr/share/benchdnn/inputs/conv/shapes_fastrcnn_p1
/usr/share/benchdnn/inputs/conv/shapes_fastrcnn_p2
/usr/share/benchdnn/inputs/conv/shapes_fastrcnn_p3
/usr/share/benchdnn/inputs/conv/shapes_ffn
/usr/share/benchdnn/inputs/conv/shapes_fused_large_src
/usr/share/benchdnn/inputs/conv/shapes_fused_mobilenet_stride_1
/usr/share/benchdnn/inputs/conv/shapes_fused_mobilenet_stride_2
/usr/share/benchdnn/inputs/conv/shapes_gemm
/usr/share/benchdnn/inputs/conv/shapes_googlenet_v1
/usr/share/benchdnn/inputs/conv/shapes_googlenet_v2
/usr/share/benchdnn/inputs/conv/shapes_googlenet_v3
/usr/share/benchdnn/inputs/conv/shapes_large_padding
/usr/share/benchdnn/inputs/conv/shapes_maskrcnn_p1
/usr/share/benchdnn/inputs/conv/shapes_maskrcnn_p2
/usr/share/benchdnn/inputs/conv/shapes_mobilenet
/usr/share/benchdnn/inputs/conv/shapes_mobilenet_dw
/usr/share/benchdnn/inputs/conv/shapes_pointnet
/usr/share/benchdnn/inputs/conv/shapes_regression_1x1
/usr/share/benchdnn/inputs/conv/shapes_regression_dw
/usr/share/benchdnn/inputs/conv/shapes_regression_gemm
/usr/share/benchdnn/inputs/conv/shapes_regression_padding
/usr/share/benchdnn/inputs/conv/shapes_regression_small_spatial
/usr/share/benchdnn/inputs/conv/shapes_resnet_50
/usr/share/benchdnn/inputs/conv/shapes_resnet_50_sparse
/usr/share/benchdnn/inputs/conv/shapes_resnet_50_v1_5
/usr/share/benchdnn/inputs/conv/shapes_resnext_101
/usr/share/benchdnn/inputs/conv/shapes_segnet
/usr/share/benchdnn/inputs/conv/shapes_src-transpose_padding
/usr/share/benchdnn/inputs/conv/shapes_ssd_300_voc0712
/usr/share/benchdnn/inputs/conv/shapes_ssd_mobilenet
/usr/share/benchdnn/inputs/conv/shapes_ssd_resnet34_inference
/usr/share/benchdnn/inputs/conv/shapes_ssd_resnet34_training
/usr/share/benchdnn/inputs/conv/shapes_tails
/usr/share/benchdnn/inputs/conv/shapes_tails_gpu
/usr/share/benchdnn/inputs/conv/shapes_unet
/usr/share/benchdnn/inputs/conv/shapes_vgg_11
/usr/share/benchdnn/inputs/conv/shapes_vgg_19
/usr/share/benchdnn/inputs/conv/shapes_xception
/usr/share/benchdnn/inputs/conv/shapes_yolov2
/usr/share/benchdnn/inputs/conv/test_conv_3d
/usr/share/benchdnn/inputs/conv/test_conv_3d_f32_nxc
/usr/share/benchdnn/inputs/conv/test_conv_all
/usr/share/benchdnn/inputs/conv/test_conv_all_topologies
/usr/share/benchdnn/inputs/conv/test_conv_all_topologies_f32_nxc
/usr/share/benchdnn/inputs/conv/test_conv_attrs
/usr/share/benchdnn/inputs/conv/test_conv_attrs_f32_nxc
/usr/share/benchdnn/inputs/conv/test_conv_bfloat16
/usr/share/benchdnn/inputs/conv/test_conv_bfloat16_nxc
/usr/share/benchdnn/inputs/conv/test_conv_bfloat16_ymm
/usr/share/benchdnn/inputs/conv/test_conv_ci
/usr/share/benchdnn/inputs/conv/test_conv_depthwise
/usr/share/benchdnn/inputs/conv/test_conv_dilated
/usr/share/benchdnn/inputs/conv/test_conv_dilated_f32_nxc
/usr/share/benchdnn/inputs/conv/test_conv_dt
/usr/share/benchdnn/inputs/conv/test_conv_dt_nxc
/usr/share/benchdnn/inputs/conv/test_conv_function
/usr/share/benchdnn/inputs/conv/test_conv_gemm_bfloat16
/usr/share/benchdnn/inputs/conv/test_conv_gemm_bfloat16_nxc
/usr/share/benchdnn/inputs/conv/test_conv_gemm_dt
/usr/share/benchdnn/inputs/conv/test_conv_gemm_dt_nxc
/usr/share/benchdnn/inputs/conv/test_conv_gemm_int8
/usr/share/benchdnn/inputs/conv/test_conv_gpu
/usr/share/benchdnn/inputs/conv/test_conv_gpu_ci
/usr/share/benchdnn/inputs/conv/test_conv_int8
/usr/share/benchdnn/inputs/conv/test_conv_regression
/usr/share/benchdnn/inputs/conv/test_conv_regression_gpu
/usr/share/benchdnn/inputs/conv/test_conv_wino_f32
/usr/share/benchdnn/inputs/conv/test_conv_wino_gpu
/usr/share/benchdnn/inputs/conv/test_conv_wino_int8
/usr/share/benchdnn/inputs/deconv
/usr/share/benchdnn/inputs/deconv/harness_arbitrary_dst
/usr/share/benchdnn/inputs/deconv/harness_deconv_attrs_int8
/usr/share/benchdnn/inputs/deconv/harness_deconv_attrs_int8_asymmetric
/usr/share/benchdnn/inputs/deconv/harness_deconv_regression_general_f32
/usr/share/benchdnn/inputs/deconv/harness_deconv_regression_general_int8
/usr/share/benchdnn/inputs/deconv/set_all
/usr/share/benchdnn/inputs/deconv/shapes_1d
/usr/share/benchdnn/inputs/deconv/shapes_1x1
/usr/share/benchdnn/inputs/deconv/shapes_2d
/usr/share/benchdnn/inputs/deconv/shapes_3d
/usr/share/benchdnn/inputs/deconv/shapes_ci
/usr/share/benchdnn/inputs/deconv/shapes_dilated
/usr/share/benchdnn/inputs/deconv/test_deconv_all
/usr/share/benchdnn/inputs/deconv/test_deconv_all_f32_nxc
/usr/share/benchdnn/inputs/deconv/test_deconv_bfloat16
/usr/share/benchdnn/inputs/deconv/test_deconv_bfloat16_nxc
/usr/share/benchdnn/inputs/deconv/test_deconv_bfloat16_ymm
/usr/share/benchdnn/inputs/deconv/test_deconv_ci
/usr/share/benchdnn/inputs/deconv/test_deconv_gpu
/usr/share/benchdnn/inputs/deconv/test_deconv_int8
/usr/share/benchdnn/inputs/eltwise
/usr/share/benchdnn/inputs/eltwise/harness_eltwise_regression
/usr/share/benchdnn/inputs/eltwise/harness_eltwise_saturation
/usr/share/benchdnn/inputs/eltwise/option_set_all_algs
/usr/share/benchdnn/inputs/eltwise/option_set_all_algs_ci
/usr/share/benchdnn/inputs/eltwise/option_set_all_algs_int8
/usr/share/benchdnn/inputs/eltwise/option_set_all_algs_int8_ci
/usr/share/benchdnn/inputs/eltwise/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/eltwise/shapes_ci
/usr/share/benchdnn/inputs/eltwise/shapes_eltwise
/usr/share/benchdnn/inputs/eltwise/test_eltwise_all
/usr/share/benchdnn/inputs/eltwise/test_eltwise_bfloat16
/usr/share/benchdnn/inputs/eltwise/test_eltwise_ci
/usr/share/benchdnn/inputs/eltwise/test_eltwise_gpu
/usr/share/benchdnn/inputs/ip
/usr/share/benchdnn/inputs/ip/harness_ip_sanitizers
/usr/share/benchdnn/inputs/ip/harness_ip_saturation
/usr/share/benchdnn/inputs/ip/harness_ip_tag
/usr/share/benchdnn/inputs/ip/harness_ip_tag_gpu
/usr/share/benchdnn/inputs/ip/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/ip/option_set_fwks_key_perf_gpu
/usr/share/benchdnn/inputs/ip/perf_ip_cpu
/usr/share/benchdnn/inputs/ip/perf_ip_gen9
/usr/share/benchdnn/inputs/ip/perf_ip_inference_lb
/usr/share/benchdnn/inputs/ip/perf_ip_inference_sb
/usr/share/benchdnn/inputs/ip/perf_ip_knx
/usr/share/benchdnn/inputs/ip/perf_ip_training
/usr/share/benchdnn/inputs/ip/perf_ip_xe_hp
/usr/share/benchdnn/inputs/ip/perf_ip_xe_lp
/usr/share/benchdnn/inputs/ip/set_all
/usr/share/benchdnn/inputs/ip/set_gpu
/usr/share/benchdnn/inputs/ip/set_topologies
/usr/share/benchdnn/inputs/ip/shapes_0d
/usr/share/benchdnn/inputs/ip/shapes_0d_gpu
/usr/share/benchdnn/inputs/ip/shapes_1d
/usr/share/benchdnn/inputs/ip/shapes_3d
/usr/share/benchdnn/inputs/ip/shapes_alexnet
/usr/share/benchdnn/inputs/ip/shapes_bert
/usr/share/benchdnn/inputs/ip/shapes_bert_large
/usr/share/benchdnn/inputs/ip/shapes_ci
/usr/share/benchdnn/inputs/ip/shapes_dlrm
/usr/share/benchdnn/inputs/ip/shapes_gnmt
/usr/share/benchdnn/inputs/ip/shapes_googlenet_v1
/usr/share/benchdnn/inputs/ip/shapes_googlenet_v3
/usr/share/benchdnn/inputs/ip/shapes_maskrcnn
/usr/share/benchdnn/inputs/ip/shapes_ncf
/usr/share/benchdnn/inputs/ip/shapes_regression
/usr/share/benchdnn/inputs/ip/shapes_resnet_50
/usr/share/benchdnn/inputs/ip/shapes_resnet_50_sparse
/usr/share/benchdnn/inputs/ip/shapes_rnn_t
/usr/share/benchdnn/inputs/ip/shapes_transformer_lt
/usr/share/benchdnn/inputs/ip/shapes_vgg16
/usr/share/benchdnn/inputs/ip/shapes_wd
/usr/share/benchdnn/inputs/ip/test_ip_acl
/usr/share/benchdnn/inputs/ip/test_ip_all
/usr/share/benchdnn/inputs/ip/test_ip_bf32_bfloat16
/usr/share/benchdnn/inputs/ip/test_ip_bfloat16
/usr/share/benchdnn/inputs/ip/test_ip_bfloat16_ymm
/usr/share/benchdnn/inputs/ip/test_ip_ci
/usr/share/benchdnn/inputs/ip/test_ip_gpu
/usr/share/benchdnn/inputs/ip/test_ip_int8
/usr/share/benchdnn/inputs/lnorm
/usr/share/benchdnn/inputs/lnorm/option_set_all
/usr/share/benchdnn/inputs/lnorm/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/lnorm/shapes_ci
/usr/share/benchdnn/inputs/lnorm/test_lnorm_all
/usr/share/benchdnn/inputs/lnorm/test_lnorm_bfloat16
/usr/share/benchdnn/inputs/lnorm/test_lnorm_ci
/usr/share/benchdnn/inputs/lnorm/test_lnorm_gpu
/usr/share/benchdnn/inputs/lnorm/test_lnorm_int8
/usr/share/benchdnn/inputs/lrn
/usr/share/benchdnn/inputs/lrn/set_all
/usr/share/benchdnn/inputs/lrn/shapes_0d
/usr/share/benchdnn/inputs/lrn/shapes_2d
/usr/share/benchdnn/inputs/lrn/shapes_3d
/usr/share/benchdnn/inputs/lrn/shapes_ci
/usr/share/benchdnn/inputs/lrn/shapes_topologies
/usr/share/benchdnn/inputs/lrn/test_lrn_all
/usr/share/benchdnn/inputs/lrn/test_lrn_bfloat16
/usr/share/benchdnn/inputs/lrn/test_lrn_ci
/usr/share/benchdnn/inputs/lrn/test_lrn_gpu
/usr/share/benchdnn/inputs/matmul
/usr/share/benchdnn/inputs/matmul/harness_matmul_bert_inf_lb_bfloat16
/usr/share/benchdnn/inputs/matmul/harness_matmul_bert_inf_lb_int8
/usr/share/benchdnn/inputs/matmul/harness_matmul_bert_inf_sb_bfloat16
/usr/share/benchdnn/inputs/matmul/harness_matmul_bert_inf_sb_int8
/usr/share/benchdnn/inputs/matmul/harness_matmul_bert_tr_bfloat16
/usr/share/benchdnn/inputs/matmul/harness_matmul_data_tags
/usr/share/benchdnn/inputs/matmul/harness_matmul_regression_f32
/usr/share/benchdnn/inputs/matmul/harness_matmul_regression_int8
/usr/share/benchdnn/inputs/matmul/harness_matmul_runtime_f32
/usr/share/benchdnn/inputs/matmul/harness_matmul_runtime_int8
/usr/share/benchdnn/inputs/matmul/harness_matmul_strides
/usr/share/benchdnn/inputs/matmul/harness_matmul_transformer_lt_inf_lb_bfloat16
/usr/share/benchdnn/inputs/matmul/harness_matmul_transformer_lt_inf_lb_int8
/usr/share/benchdnn/inputs/matmul/harness_matmul_transformer_lt_inf_sb_bfloat16
/usr/share/benchdnn/inputs/matmul/harness_matmul_transformer_lt_inf_sb_int8
/usr/share/benchdnn/inputs/matmul/harness_matmul_transformer_lt_tr_bfloat16
/usr/share/benchdnn/inputs/matmul/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/matmul/option_set_fwks_key_perf_gpu
/usr/share/benchdnn/inputs/matmul/perf_matmul_inference_batched
/usr/share/benchdnn/inputs/matmul/perf_matmul_inference_lb
/usr/share/benchdnn/inputs/matmul/perf_matmul_training
/usr/share/benchdnn/inputs/matmul/shapes_2d
/usr/share/benchdnn/inputs/matmul/shapes_2d_ci
/usr/share/benchdnn/inputs/matmul/shapes_3d
/usr/share/benchdnn/inputs/matmul/shapes_4d
/usr/share/benchdnn/inputs/matmul/shapes_bert
/usr/share/benchdnn/inputs/matmul/shapes_bert_large
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_inf_lb_alexnet
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_inf_lb_dlrm
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_inf_lb_gmnt
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_inf_lb_googlenet
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_inf_lb_maskrcnn
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_inf_lb_ncf
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_inf_lb_resnet
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_inf_lb_rnn_t
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_inf_lb_vgg16
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_inf_lb_wd
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_inf_sb_dien
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_alexnet_bwd_d
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_alexnet_bwd_w
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_alexnet_fwd
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_dlrm_bwd_d
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_dlrm_bwd_w
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_dlrm_fwd
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_gmnt_bwd_d
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_gmnt_bwd_w
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_gmnt_fwd
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_googlenet_bwd_d
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_googlenet_bwd_w
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_googlenet_fwd
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_maskrcnn_bwd_d
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_maskrcnn_bwd_w
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_maskrcnn_fwd
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_ncf_bwd_d
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_ncf_bwd_w
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_ncf_fwd
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_resnet_bwd_d
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_resnet_bwd_w
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_resnet_fwd
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_rnn_t_bwd_d
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_rnn_t_bwd_w
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_rnn_t_fwd
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_vgg16_bwd_d
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_vgg16_bwd_w
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_vgg16_fwd
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_wd_bwd_d
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_wd_bwd_w
/usr/share/benchdnn/inputs/matmul/shapes_converted_ip_tr_wd_fwd
/usr/share/benchdnn/inputs/matmul/shapes_multidim
/usr/share/benchdnn/inputs/matmul/shapes_transformer
/usr/share/benchdnn/inputs/matmul/test_matmul_all
/usr/share/benchdnn/inputs/matmul/test_matmul_bf32_bf16
/usr/share/benchdnn/inputs/matmul/test_matmul_bfloat16
/usr/share/benchdnn/inputs/matmul/test_matmul_bfloat16_ymm
/usr/share/benchdnn/inputs/matmul/test_matmul_ci
/usr/share/benchdnn/inputs/matmul/test_matmul_gpu
/usr/share/benchdnn/inputs/matmul/test_matmul_int8
/usr/share/benchdnn/inputs/matmul/test_matmul_multidims
/usr/share/benchdnn/inputs/pool
/usr/share/benchdnn/inputs/pool/harness_pooling_different_dt
/usr/share/benchdnn/inputs/pool/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/pool/perf_pool_gpu
/usr/share/benchdnn/inputs/pool/set_all
/usr/share/benchdnn/inputs/pool/set_all_small
/usr/share/benchdnn/inputs/pool/set_topologies
/usr/share/benchdnn/inputs/pool/set_topologies_gpu
/usr/share/benchdnn/inputs/pool/shapes_1d
/usr/share/benchdnn/inputs/pool/shapes_2d
/usr/share/benchdnn/inputs/pool/shapes_2d_small
/usr/share/benchdnn/inputs/pool/shapes_3d
/usr/share/benchdnn/inputs/pool/shapes_3d_small
/usr/share/benchdnn/inputs/pool/shapes_3d_unet
/usr/share/benchdnn/inputs/pool/shapes_alexnet
/usr/share/benchdnn/inputs/pool/shapes_basic
/usr/share/benchdnn/inputs/pool/shapes_global_pooling
/usr/share/benchdnn/inputs/pool/shapes_googlenet_v1
/usr/share/benchdnn/inputs/pool/shapes_googlenet_v3
/usr/share/benchdnn/inputs/pool/shapes_i3d_resnet50_v1
/usr/share/benchdnn/inputs/pool/shapes_resnet_50
/usr/share/benchdnn/inputs/pool/test_pool_all
/usr/share/benchdnn/inputs/pool/test_pool_bfloat16
/usr/share/benchdnn/inputs/pool/test_pool_ci
/usr/share/benchdnn/inputs/pool/test_pool_float16
/usr/share/benchdnn/inputs/pool/test_pool_gpu
/usr/share/benchdnn/inputs/prelu
/usr/share/benchdnn/inputs/prelu/option_set_all
/usr/share/benchdnn/inputs/prelu/shapes_all
/usr/share/benchdnn/inputs/prelu/shapes_ci
/usr/share/benchdnn/inputs/prelu/test_prelu_all
/usr/share/benchdnn/inputs/prelu/test_prelu_bfloat16
/usr/share/benchdnn/inputs/prelu/test_prelu_ci
/usr/share/benchdnn/inputs/prelu/test_prelu_gpu
/usr/share/benchdnn/inputs/reduction
/usr/share/benchdnn/inputs/reduction/harness_reduction_bf16
/usr/share/benchdnn/inputs/reduction/harness_reduction_f16
/usr/share/benchdnn/inputs/reduction/harness_reduction_f32
/usr/share/benchdnn/inputs/reduction/harness_reduction_i8
/usr/share/benchdnn/inputs/reduction/option_set_all
/usr/share/benchdnn/inputs/reduction/option_set_all_algs
/usr/share/benchdnn/inputs/reduction/option_set_all_algs_ci
/usr/share/benchdnn/inputs/reduction/option_set_all_algs_int8
/usr/share/benchdnn/inputs/reduction/option_set_all_algs_int8_ci
/usr/share/benchdnn/inputs/reduction/shapes_ci
/usr/share/benchdnn/inputs/reduction/shapes_gpu_all
/usr/share/benchdnn/inputs/reduction/shapes_gpu_small_set
/usr/share/benchdnn/inputs/reduction/test_reduction_all
/usr/share/benchdnn/inputs/reduction/test_reduction_bfloat16
/usr/share/benchdnn/inputs/reduction/test_reduction_ci
/usr/share/benchdnn/inputs/reduction/test_reduction_float16
/usr/share/benchdnn/inputs/reduction/test_reduction_gpu
/usr/share/benchdnn/inputs/reorder
/usr/share/benchdnn/inputs/reorder/harness_reorder_amx
/usr/share/benchdnn/inputs/reorder/harness_reorder_compensation
/usr/share/benchdnn/inputs/reorder/harness_reorder_cross_engine_gpu
/usr/share/benchdnn/inputs/reorder/harness_reorder_runtime
/usr/share/benchdnn/inputs/reorder/harness_reorder_saturation
/usr/share/benchdnn/inputs/reorder/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/reorder/test_reorder_all
/usr/share/benchdnn/inputs/reorder/test_reorder_bfloat16
/usr/share/benchdnn/inputs/reorder/test_reorder_ci
/usr/share/benchdnn/inputs/reorder/test_reorder_float16
/usr/share/benchdnn/inputs/reorder/test_reorder_gpu
/usr/share/benchdnn/inputs/resampling
/usr/share/benchdnn/inputs/resampling/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/resampling/set_all
/usr/share/benchdnn/inputs/resampling/shapes_1d
/usr/share/benchdnn/inputs/resampling/shapes_2d
/usr/share/benchdnn/inputs/resampling/shapes_3d
/usr/share/benchdnn/inputs/resampling/shapes_ci
/usr/share/benchdnn/inputs/resampling/shapes_maskrcnn
/usr/share/benchdnn/inputs/resampling/test_resampling_all
/usr/share/benchdnn/inputs/resampling/test_resampling_bfloat16
/usr/share/benchdnn/inputs/resampling/test_resampling_ci
/usr/share/benchdnn/inputs/resampling/test_resampling_gpu
/usr/share/benchdnn/inputs/rnn
/usr/share/benchdnn/inputs/rnn/harness_augru_bf32
/usr/share/benchdnn/inputs/rnn/harness_augru_bfloat16
/usr/share/benchdnn/inputs/rnn/harness_gru_bf32
/usr/share/benchdnn/inputs/rnn/harness_gru_bfloat16
/usr/share/benchdnn/inputs/rnn/harness_gru_f32
/usr/share/benchdnn/inputs/rnn/harness_gru_int8
/usr/share/benchdnn/inputs/rnn/harness_lstm_bf32
/usr/share/benchdnn/inputs/rnn/harness_lstm_bfloat16
/usr/share/benchdnn/inputs/rnn/harness_lstm_f32
/usr/share/benchdnn/inputs/rnn/harness_lstm_int8
/usr/share/benchdnn/inputs/rnn/harness_rnn_bf32
/usr/share/benchdnn/inputs/rnn/harness_rnn_bfloat16
/usr/share/benchdnn/inputs/rnn/harness_rnn_f32
/usr/share/benchdnn/inputs/rnn/option_set_gnmt_decoder
/usr/share/benchdnn/inputs/rnn/option_set_gnmt_encoder
/usr/share/benchdnn/inputs/rnn/option_set_large
/usr/share/benchdnn/inputs/rnn/option_set_lstmp_large
/usr/share/benchdnn/inputs/rnn/option_set_lstmp_small
/usr/share/benchdnn/inputs/rnn/option_set_perf_inference_lb
/usr/share/benchdnn/inputs/rnn/option_set_perf_inference_sb
/usr/share/benchdnn/inputs/rnn/option_set_perf_training
/usr/share/benchdnn/inputs/rnn/option_set_rnnt
/usr/share/benchdnn/inputs/rnn/option_set_small
/usr/share/benchdnn/inputs/rnn/perf_rnn_cpu
/usr/share/benchdnn/inputs/rnn/perf_rnn_gen9
/usr/share/benchdnn/inputs/rnn/perf_rnn_inference_lb
/usr/share/benchdnn/inputs/rnn/perf_rnn_inference_sb
/usr/share/benchdnn/inputs/rnn/perf_rnn_knx
/usr/share/benchdnn/inputs/rnn/perf_rnn_training
/usr/share/benchdnn/inputs/rnn/perf_rnn_xe_hp
/usr/share/benchdnn/inputs/rnn/perf_rnn_xe_lp
/usr/share/benchdnn/inputs/rnn/shapes_deepspeech_2
/usr/share/benchdnn/inputs/rnn/shapes_inference
/usr/share/benchdnn/inputs/rnn/shapes_large
/usr/share/benchdnn/inputs/rnn/shapes_large_gru
/usr/share/benchdnn/inputs/rnn/shapes_lstmp_large
/usr/share/benchdnn/inputs/rnn/shapes_lstmp_small
/usr/share/benchdnn/inputs/rnn/shapes_rnn_t
/usr/share/benchdnn/inputs/rnn/shapes_small
/usr/share/benchdnn/inputs/rnn/shapes_small_gru
/usr/share/benchdnn/inputs/rnn/shapes_training
/usr/share/benchdnn/inputs/rnn/test_augru_all
/usr/share/benchdnn/inputs/rnn/test_augru_bf32_bfloat16
/usr/share/benchdnn/inputs/rnn/test_augru_bfloat16
/usr/share/benchdnn/inputs/rnn/test_augru_ci
/usr/share/benchdnn/inputs/rnn/test_gru_all
/usr/share/benchdnn/inputs/rnn/test_gru_bf32_bfloat16
/usr/share/benchdnn/inputs/rnn/test_gru_bfloat16
/usr/share/benchdnn/inputs/rnn/test_gru_ci
/usr/share/benchdnn/inputs/rnn/test_gru_int8
/usr/share/benchdnn/inputs/rnn/test_lstm_all
/usr/share/benchdnn/inputs/rnn/test_lstm_bf32_bfloat16
/usr/share/benchdnn/inputs/rnn/test_lstm_bfloat16
/usr/share/benchdnn/inputs/rnn/test_lstm_bfloat16_ymm
/usr/share/benchdnn/inputs/rnn/test_lstm_ci
/usr/share/benchdnn/inputs/rnn/test_lstm_int8
/usr/share/benchdnn/inputs/rnn/test_rnn_all
/usr/share/benchdnn/inputs/rnn/test_rnn_bf32_bfloat16
/usr/share/benchdnn/inputs/rnn/test_rnn_bfloat16
/usr/share/benchdnn/inputs/rnn/test_rnn_ci
/usr/share/benchdnn/inputs/rnn/test_rnn_gpu
/usr/share/benchdnn/inputs/self
/usr/share/benchdnn/inputs/self/test_self_ci
/usr/share/benchdnn/inputs/self/test_self_f32
/usr/share/benchdnn/inputs/shuffle
/usr/share/benchdnn/inputs/shuffle/option_set_all
/usr/share/benchdnn/inputs/shuffle/option_set_min
/usr/share/benchdnn/inputs/shuffle/option_set_perf
/usr/share/benchdnn/inputs/shuffle/perf_shuffle_cpu
/usr/share/benchdnn/inputs/shuffle/test_shuffle_all
/usr/share/benchdnn/inputs/shuffle/test_shuffle_bfloat16
/usr/share/benchdnn/inputs/shuffle/test_shuffle_ci
/usr/share/benchdnn/inputs/shuffle/test_shuffle_float16
/usr/share/benchdnn/inputs/shuffle/test_shuffle_gpu
/usr/share/benchdnn/inputs/softmax
/usr/share/benchdnn/inputs/softmax/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/softmax/set_0d
/usr/share/benchdnn/inputs/softmax/shapes_0d
/usr/share/benchdnn/inputs/softmax/shapes_2d
/usr/share/benchdnn/inputs/softmax/shapes_3d
/usr/share/benchdnn/inputs/softmax/shapes_ci
/usr/share/benchdnn/inputs/softmax/shapes_nlp
/usr/share/benchdnn/inputs/softmax/test_softmax_acl
/usr/share/benchdnn/inputs/softmax/test_softmax_all
/usr/share/benchdnn/inputs/softmax/test_softmax_bfloat16
/usr/share/benchdnn/inputs/softmax/test_softmax_ci
/usr/share/benchdnn/inputs/softmax/test_softmax_gpu
/usr/share/benchdnn/inputs/sum
/usr/share/benchdnn/inputs/sum/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/sum/test_sum_all
/usr/share/benchdnn/inputs/sum/test_sum_bfloat16
/usr/share/benchdnn/inputs/sum/test_sum_ci
/usr/share/benchdnn/inputs/sum/test_sum_float16
/usr/share/benchdnn/inputs/sum/test_sum_gpu
/usr/share/benchdnn/inputs/zeropad
/usr/share/benchdnn/inputs/zeropad/option_set_fwks_key_gpu
/usr/share/benchdnn/inputs/zeropad/set_dim1_block_3d
/usr/share/benchdnn/inputs/zeropad/set_dim1dim2_block_2d
/usr/share/benchdnn/inputs/zeropad/set_dim1dim2_block_3d
/usr/share/benchdnn/inputs/zeropad/set_dim2_block_3d
/usr/share/benchdnn/inputs/zeropad/set_dim2dim3_block_4d
/usr/share/benchdnn/inputs/zeropad/shapes_dim1_block_3d
/usr/share/benchdnn/inputs/zeropad/shapes_dim1dim2_block_2d
/usr/share/benchdnn/inputs/zeropad/shapes_dim1dim2_block_3d
/usr/share/benchdnn/inputs/zeropad/shapes_dim2_block_3d
/usr/share/benchdnn/inputs/zeropad/shapes_dim2dim3_block_4d
/usr/share/benchdnn/inputs/zeropad/test_zeropad_ci
/usr/share/benchdnn/inputs/zeropad/test_zeropad_gpu