| Name : verilator
| |
| Version : 3.900
| Vendor : openSUSE
|
| Release : lp152.3.7
| Date : 2020-05-16 21:37:03
|
| Group : Productivity/Scientific/Electronics
| Source RPM : verilator-3.900-lp152.3.7.src.rpm
|
| Size : 11.72 MB
| |
| Packager : https://bugs_opensuse_org
| |
| Summary : Compiling Verilog HDL simulator
|
Description :
Verilator compiles synthesizable Verilog (not test-bench code), plus
some PSL, SystemVerilog and Synthesis assertions into an optimized
model which is in turn wrapped inside a C++/SystemC module for faster
execution.
|
RPM found in directory: /vol/rzm3/linux-opensuse/distribution/leap/15.2/repo/oss/x86_64 |
