| Name : verilator
| |
| Version : 5.026
| Vendor : obs://build_opensuse_org/home:jfshorter
|
| Release : lp156.7.1
| Date : 2024-08-16 11:50:46
|
| Group : Productivity/Scientific/Electronics
| Source RPM : verilator-5.026-lp156.7.1.src.rpm
|
| Size : 29.87 MB
| |
| Packager : https://www_suse_com/
| |
| Summary : Compiling Verilog HDL simulator
|
Description :
Verilator compiles synthesizable Verilog (not test-bench code), plus
some PSL, SystemVerilog and Synthesis assertions into an optimized
model which is in turn wrapped inside a C++/SystemC module for faster
execution.
|
RPM found in directory: /packages/linux-pbone/ftp5.gwdg.de/pub/opensuse/repositories/home:/jfshorter/15.6/x86_64 |
