| Name : verilator
| |
| Version : 3.900
| Vendor : openSUSE
|
| Release : bp150.2.4
| Date : 2018-07-30 19:05:43
|
| Group : Productivity/Scientific/Electronics
| Source RPM : verilator-3.900-bp150.2.4.src.rpm
|
| Size : 14.45 MB
| |
| Packager : https://bugs_opensuse_org
| |
| Summary : Compiling Verilog HDL simulator
|
Description :
Verilator compiles synthesizable Verilog (not test-bench code), plus
some PSL, SystemVerilog and Synthesis assertions into an optimized
model which is in turn wrapped inside a C++/SystemC module for faster
execution.
|
RPM found in directory: /packages/linux-pbone/ftp5.gwdg.de/pub/opensuse/repositories/openSUSE:/Backports:/SLE-15/standard/x86_64 |
